[email protected] silicon and generally, two types of anisotropic

[email protected] is a partnership established by the Defence
Science & Technology Agency (DSTA) and Nanyang Technological University
(NTU). A Memorandum of Understanding was signed between NTU and DSTA on 25th
March 2003 on the establishment of [email protected] for the coordinating and development
of long term technology programmes. [email protected] was officially declared open by Mr
Teo Chee Hean, Minister for Defence, Singapore on 7th September 2007.

1.1 
Internship Objectives

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The scope of this internship was to investigate and
optimize sample preparation techniques for advanced application-specific
integrated circuits (ASICs) with global uniformity using tools such as
precision milling/polishing system and optical imaging.

More specifically, the aim was to thin the silicon
layer from the backside of the wafer chip to below 10?m. The need for such a thin and compact product is essential to meeting
form factor requirements as every micron matters in ultra-compact products.

 

2.   Literature Review

2.1  Mechanical
Grinding

Mechanical grinding is one of the most common
method used for wafer thinning and it usually involves 2 steps starting with
coarse grinding followed by fine grinding. Typically, the bulk of the grinding
is completed during coarse grinding and this is the main process that will
reduce the thickness of the wafer chip significantly. However, coarse grinding
of the chip will result in micro-cracks which damages the silicon. Fine
grinding will then complete the whole process by removing the damage from
coarse grinding and reducing the surface roughness.

2.2 
Chemical Etching

Chemical etching of silicon is another method used
to reduce the thickness of silicon and generally, two types of anisotropic
etchants are used. They are potassium hydroxide (KOH) and tetramethylammonium
hydroxide (TMAH) which is an alkaline organic solution. KOH shows poor
selectivity between silicon and silicon dioxide. It is also not compatible with
the complementary metal-oxide-semiconductor (CMOS) process. However, TMAH is
CMOS compatible and shows a better selectivity between silicon and silicon
dioxide as compare to KOH.

 

3.   Methods

3.1  Automated
Selected Area Polisher (ASAP)

ASAP is designed to tin and polish small selected
areas in electronic packages and wafer-level dies. It is mainly used for the
backside or front side preparation of semiconductor chips or packages.

Figure 1: ASAP

The first step is mounting the chip onto the sample
holder plate. The chip is then held securely on all sides with screws. Next,
the sample holder plate is heated up to 80oC. By heating it up, the
package chip will “relax” thus flattening the die and reducing stress during
silicon thinning. Depending on the die or cavity size, the appropriate diameter
tool size would be as seen in Table 1 below.

Tool Diameter

Suggested Die/Cavity Size Range (X or Y Dimension)

1mm

3mm to 6mm

2mm

6mm to 9mm

3mm

9mm to 15mm

5mm

15mm upwards

 

Next, tilting adjustment and centring was carried
out. Using a 5-point tilt auto generate, it is only used during the initial
setup as it overrides any previously established recipe set points. The start
and end points are first set before the machine automatically find the 5 points
and calculate the tilt. The tilt is then manually adjusted using the X Y tilt
knobs once the process is finished. Once the tilt is less than 0.01 turns in
either clockwise or anti-clockwise direction, the next step can begin.

 

The tool head is then raised and locked, allowing
the tool to be removed from the tool spindle and replaced with a fine diamond
tool which is used to thin down the silicon via milling. The locking screw is
then unlocked and lowered gently till it reaches the bottom end.

Once the start and end points are set up, pressing
XY centre would bring the tool to the centre of the cavity defined. The force
is then set to be on and Z is brought down till the force reads 100g and at
that point, Z is set as 0 in order to track

Another factor or setting to take note of was the
travel pattern of the tool. There were 8 different patterns available but
generally only ASAP-1, ASAP-1 X and ASAP-1 Swap X-Y were used for standard
removal. Several other settings to take note of were the table speed and tool
speed. The settings are very flexible and may change depending on the sample
type and cavity size.

Figure 2: Table travel patterns

The general guide for backside thinning of a sample
using a sample is as shown in Table 2 below. This is a guide and the procedure
differs according to different samples and requirements. For the case of the
wafer chip that I was working on, Step 1 and 2 was not necessary as the
backside of the silicon was already exposed, showing the silicon. Thus, from
there, all that had to be done was to thin down the silicon to the desired
level before polishing.

Table 2: Six step process for backside thinning of a packaged device

Step 3 – Fine Diamond

The main purpose of using the fine diamond tool is
to remove the bulk thickness of the silicon and this is done in the presence of
a lubricant called extender fluid. Generally, silicon is removed in increments
of 50?m at a time. The process
was stopped when the desired depth of around 100?m was achieved.

Step 4 – Blue Diamond
Paste

After using the fine
diamond tool, the Xylem tool was used for both the blue and yellow diamond
paste but each tool was to be used for each respective diamond paste only
without switching. The blue diamond paste and extender fluid was applied to the
surface of the silicon and spread over the cavity. The process was then run for
the desired time and once it was completed, the sample was cleaned thoroughly
to remove all traces of the blue diamond paste. This was to ensure that no
scratches would be left on the next step due to particles of blue diamond paste
left behind.

Step 5 – Yellow Diamond
Paste

Another Xylem tool was
used for the yellow diamond paste and similarly to the blue diamond paste, the
yellow diamond paste and extender fluid were applied to the to the silicon
surface and spread over the cavity. The sample was also cleaned thoroughly to
remove all traces of the yellow diamond paste.

Step 6 – Colloidal Silica

Xybove tool was used and a few drops of colloidal
silica was applied to the silicon surface. The sample was not heated at this
stage as if the colloidal silica was heated and dry out, it would cause
precipitation of the silica and it would be difficult to remove. Once the
process was completed, the sample was cleaned thoroughly.

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